http://brainengineering.dartmouth.edu/psyc40wiki/index.php?action=history&feed=atom&title=24F_Final_Project%3A_Neuromorphic_Computing24F Final Project: Neuromorphic Computing - Revision history2026-09-01T02:53:09ZRevision history for this page on the wikiMediaWiki 1.29.2http://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=667&oldid=prevUser: /* Limitations and Future Research */2022-10-22T11:27:29Z<p><span dir="auto"><span class="autocomment">Limitations and Future Research</span></span></p>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Up to the present, neuromorphic hardware, and more broadly computers, have serve only demonstrative purposes and have yet to be mobilized toward pragmatic application. While, through their scale and parallel processing abilities, neuromorphic computers have been shown to vastly improve energy efficiency relative to other neural hardware and von Neumann computers, they have to perform to a higher degree of accuracy than other deep learning models.<ref name="nature"/> Lack of established standards with respect to architecture, hardware, software, sample datasets, testing tasks, and testable metrics have made it hard to conclude on the efficacy of these networks.<ref name="ibm"/> [https://www.ibm.com/us-en?utm_content=SRCWW&p1=Search&p4=43700050478421002&p5=e&p9=58700005517036100&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kx-75ChUTh9DW3CuNpeh2sAetor0a8NDhRdlab3En1jdhycnFTluxRoCVXUQAvD_BwE&gclsrc=aw.ds IBM] has additionally cited neuromorphic computers' potential viability in the improvement of autonomous vehicle navigation, identification of cyberattacks, understanding of natural language acquisition, and robot learning.<ref name="ibm"/></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Up to the present, neuromorphic hardware, and more broadly <ins class="diffchange diffchange-inline">neuromorphic </ins>computers, have serve only demonstrative purposes and have yet to be mobilized toward pragmatic application. While, through their scale and parallel processing abilities, neuromorphic computers have been shown to vastly improve energy efficiency relative to other neural hardware and von Neumann computers, they have <ins class="diffchange diffchange-inline">yet </ins>to perform to a <ins class="diffchange diffchange-inline">substantially </ins>higher degree of accuracy than other deep learning models.<ref name="nature"/> Lack of established standards with respect to architecture, hardware, software, sample datasets, testing tasks, and testable metrics have made it hard to conclude on the efficacy of these networks.<ref name="ibm"/> [https://www.ibm.com/us-en?utm_content=SRCWW&p1=Search&p4=43700050478421002&p5=e&p9=58700005517036100&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kx-75ChUTh9DW3CuNpeh2sAetor0a8NDhRdlab3En1jdhycnFTluxRoCVXUQAvD_BwE&gclsrc=aw.ds IBM] has additionally cited neuromorphic computers' potential viability in the improvement of autonomous vehicle navigation, identification of cyberattacks, understanding of natural language acquisition, and robot learning.<ref name="ibm"/<ins class="diffchange diffchange-inline">> Much recent research revolves around the development of more advanced CPUs, circuits, and other hardware that are capable of quickly, accurately, and efficiently running AI models in order to ever more accurately mimic the architecture and processing of the human brain.<ref>Hess, P. (2024, November 7). How neuromorphic computing takes inspiration from our brains. IBM Research. https://research.ibm.com/blog/what-is-neuromorphic-or-brain-inspired-computing</ref</ins>></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>==References==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>==References==</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><references /></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><references /></div></td></tr>
</table>Userhttp://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=664&oldid=prevUser: /* Background */2022-10-22T11:27:28Z<p><span dir="auto"><span class="autocomment">Background</span></span></p>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Background ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Background ==</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Though neuromorphic computing presently remains no more than a promising concept, it is agreed upon that the foundations of the field were laid down by Caltech's Carver Mead in the late 1980s.<ref>Furber, S. (2016). Large-scale neuromorphic computing systems. Journal of Neural Engineering, 13(5), 051001. https://doi.org/10.1088/1741-2560/13/5/051001 </ref> Using human neurobiology as the model, Mead contrasted the brain's hierarchical encoding of information, such as its ability to instantly integrate sensory perception as an event with an associated emotion, with a computer's glaring lack of an ability to encode in this way; he further noted the brain alone's capacity to combine signal processing with [https://www.cell.com/current-biology/fulltext/S0960-9822(23)01442-2#:~:text=Gain%20control%20is%20a%20process,needed%20or%20how%20they%20interact. gain control]. Mead nonetheless recognized the glaring need to better understand the brain before an accurately-designed neuromorphic computer could be realized; he emphasizes the fact that it is barely understood how the brain, for some given amount of energy output, is able to perform many times more computations than even the most advanced computer.<ref>Carver Mead: Microelectronics, Neuromorphic Computing, and life at the Frontiers of Science and Technology. SPIE, the international society for optics and photonics. (n.d.). https://spie.org/news/photonics-focus/septoct-2024/inventing-the-integrated-circuit#_=_ </ref> Mead himself, along with his PhD student Misha Mahowald, provided the first practical example of the potential of neuromorphic computing through their development of a [https://redwood.berkeley.edu/wp-content/uploads/2018/08/Mead-chapter15-silicon-retina.pdf silicon retina] in 1991, which successfully imitated output signals seen in true human retinas most notably in response to moving images.<ref>Mahowald, M. A., & Mead, C. (1991). The Silicon Retina. Scientific American, 264(5), 76–83. http://www.jstor.org/stable/24936904</ref></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Though <ins class="diffchange diffchange-inline">mainstream </ins>neuromorphic computing presently remains no more than a promising concept, it is agreed upon that the foundations of the field were laid down by Caltech's Carver Mead in the late 1980s.<ref>Furber, S. (2016). Large-scale neuromorphic computing systems. Journal of Neural Engineering, 13(5), 051001. https://doi.org/10.1088/1741-2560/13/5/051001 </ref> Using human neurobiology as the model, Mead contrasted the brain's hierarchical encoding of information, such as its ability to instantly integrate sensory perception as an event with an associated emotion, with a computer's glaring lack of an ability to encode in this way; he further noted the brain alone's capacity to combine signal processing with [https://www.cell.com/current-biology/fulltext/S0960-9822(23)01442-2#:~:text=Gain%20control%20is%20a%20process,needed%20or%20how%20they%20interact. gain control]. Mead nonetheless recognized the glaring need to better understand the brain before an accurately-designed neuromorphic computer could be realized; he emphasizes the fact that it is barely understood how the brain, for some given amount of energy output, is able to perform many times more computations than even the most advanced computer.<ref>Carver Mead: Microelectronics, Neuromorphic Computing, and life at the Frontiers of Science and Technology. SPIE, the international society for optics and photonics. (n.d.). https://spie.org/news/photonics-focus/septoct-2024/inventing-the-integrated-circuit#_=_ </ref> Mead himself, along with his PhD student Misha Mahowald, provided the first practical example of the potential of neuromorphic computing through their development of a [https://redwood.berkeley.edu/wp-content/uploads/2018/08/Mead-chapter15-silicon-retina.pdf silicon retina] in 1991, which successfully imitated output signals seen in true human retinas most notably in response to moving images.<ref>Mahowald, M. A., & Mead, C. (1991). The Silicon Retina. Scientific American, 264(5), 76–83. http://www.jstor.org/stable/24936904</ref></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== How Neuromorphic Computing Works ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== How Neuromorphic Computing Works ==</div></td></tr>
</table>Userhttp://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=663&oldid=prevUser: /* Limitations and Future Research */2022-10-22T11:27:28Z<p><span dir="auto"><span class="autocomment">Limitations and Future Research</span></span></p>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Up to the present, neuromorphic hardware, and more broadly computers, have serve only demonstrative purposes and have yet to be mobilized toward pragmatic application. While, through their scale and parallel processing abilities, neuromorphic computers have been shown to vastly improve energy efficiency relative to other neural hardware and von Neumann computers, they have to perform to a higher degree of accuracy than other deep learning models.<ref name="nature"/></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Up to the present, neuromorphic hardware, and more broadly computers, have serve only demonstrative purposes and have yet to be mobilized toward pragmatic application. While, through their scale and parallel processing abilities, neuromorphic computers have been shown to vastly improve energy efficiency relative to other neural hardware and von Neumann computers, they have to perform to a higher degree of accuracy than other deep learning models.<ref name="nature<ins class="diffchange diffchange-inline">"/> Lack of established standards with respect to architecture, hardware, software, sample datasets, testing tasks, and testable metrics have made it hard to conclude on the efficacy of these networks.<ref name="ibm"/> [https://www.ibm.com/us-en?utm_content=SRCWW&p1=Search&p4=43700050478421002&p5=e&p9=58700005517036100&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kx-75ChUTh9DW3CuNpeh2sAetor0a8NDhRdlab3En1jdhycnFTluxRoCVXUQAvD_BwE&gclsrc=aw.ds IBM] has additionally cited neuromorphic computers' potential viability in the improvement of autonomous vehicle navigation, identification of cyberattacks, understanding of natural language acquisition, and robot learning.<ref name="ibm</ins>"/></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>==References==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>==References==</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><references /></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><references /></div></td></tr>
</table>Userhttp://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=662&oldid=prevUser at 11:27, 22 October 20222022-10-22T11:27:28Z<p></p>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Up to the present, neuromorphic hardware, and more broadly computers, have serve only demonstrative purposes and have yet to be mobilized toward pragmatic application. While, through their scale and parallel processing abilities, neuromorphic computers have been shown to vastly improve energy efficiency relative to other neural hardware and von Neumann computers, they have to perform to a higher degree of accuracy than other deep learning models.<<del class="diffchange diffchange-inline">/</del>ref name="nature></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Up to the present, neuromorphic hardware, and more broadly computers, have serve only demonstrative purposes and have yet to be mobilized toward pragmatic application. While, through their scale and parallel processing abilities, neuromorphic computers have been shown to vastly improve energy efficiency relative to other neural hardware and von Neumann computers, they have to perform to a higher degree of accuracy than other deep learning models.<ref name="nature<ins class="diffchange diffchange-inline">"/</ins>></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>==References==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>==References==</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><references /></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><references /></div></td></tr>
</table>Userhttp://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=661&oldid=prevUser: /* Limitations and Future Research */2022-10-22T11:27:28Z<p><span dir="auto"><span class="autocomment">Limitations and Future Research</span></span></p>
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<td colspan='2' style="background-color: white; color:black; text-align: center;">Revision as of 11:27, 22 October 2022</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">Up to the present, neuromorphic hardware, and more broadly computers, have serve only demonstrative purposes and have yet to be mobilized toward pragmatic application. While, through their scale and parallel processing abilities, neuromorphic computers have been shown to vastly improve energy efficiency relative to other neural hardware and von Neumann computers, they have to perform to a higher degree of accuracy than other deep learning models.</ref name="nature></ins></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>==References==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>==References==</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><references /></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><references /></div></td></tr>
</table>Userhttp://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=658&oldid=prevUser: /* Hardware and Present Applications */2022-10-22T11:27:28Z<p><span dir="auto"><span class="autocomment">Hardware and Present Applications</span></span></p>
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<td colspan='2' style="background-color: white; color:black; text-align: center;">Revision as of 11:27, 22 October 2022</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once, utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once,<ins class="diffchange diffchange-inline">[[File:loihi.jpg|650px|right|thumb|caption|Loihi's connectivity]] </ins>utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td></tr>
</table>Userhttp://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=657&oldid=prevUser: /* Hardware and Present Applications */2022-10-22T11:27:28Z<p><span dir="auto"><span class="autocomment">Hardware and Present Applications</span></span></p>
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<td colspan='2' style="background-color: white; color:black; text-align: center;">Revision as of 11:27, 22 October 2022</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once, utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. <del class="diffchange diffchange-inline">[[File:loihi.jpg|500px|right|thumb|caption|Loihi's connectivity]] </del>When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once, utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td></tr>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td></tr>
</table>Userhttp://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=656&oldid=prevUser: /* Hardware and Present Applications */2022-10-22T11:27:28Z<p><span dir="auto"><span class="autocomment">Hardware and Present Applications</span></span></p>
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<td colspan='2' style="background-color: white; color:black; text-align: center;">Revision as of 11:27, 22 October 2022</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once, utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. [[File:loihi.jpg|<del class="diffchange diffchange-inline">400px</del>|right|thumb|caption|Loihi's connectivity]] When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once, utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. [[File:loihi.jpg|<ins class="diffchange diffchange-inline">500px</ins>|right|thumb|caption|Loihi's connectivity]] When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td></tr>
</table>Userhttp://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=655&oldid=prevUser: /* Hardware and Present Applications */2022-10-22T11:27:28Z<p><span dir="auto"><span class="autocomment">Hardware and Present Applications</span></span></p>
<table class="diff diff-contentalign-left" data-mw="interface">
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<td colspan='2' style="background-color: white; color:black; text-align: center;">Revision as of 11:27, 22 October 2022</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l18" >Line 18:</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[File:wafer.jpg|left|250px|thumb|caption|The wafer of BrainScaleS]]Another tangible example of advancement in neuromorphic computing, BrainScaleS, provides a model for one of the most state-of-the-art, large-scale analog spiking neural networks. Utilizing programmable plasticity units (PPUs), a type of custom CPU, BrainScale simulates synaptic plasticity at one thousand times the speed observed in the human brain. The system is comprised of twenty silicon wafers, each with fifty million plastic synapses and two hundred thousand realistic neurons, and evolves its code based on the physical properties of the hardware. The wafer are constructed of High Input Count Analog Neural Network chips (HICANNs), which simulate actively-changing neurons and synapses. The high speed of this model relative to that of the human brain, due to the fact that the model's circuits are physically shorter than those observed in the brain, permits that it requires much less power input than other simulated neuronal networks. Synaptic weights are determined by the current received by the associated neuron.<ref>About the brainscales hardware¶. About the BrainScaleS hardware - HBP Neuromorphic Computing Platform Guidebook (WIP). (n.d.). https://electronicvisions.github.io/hbp-sp9-guidebook/pm/pm_hardware_configuration.html </ref><ref>Hardware. (n.d.). https://www.humanbrainproject.eu/en/science-development/focus-areas/neuromorphic-computing/hardware/ </ref></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[File:wafer.jpg|left|250px|thumb|caption|The wafer of BrainScaleS]]Another tangible example of advancement in neuromorphic computing, BrainScaleS, provides a model for one of the most state-of-the-art, large-scale analog spiking neural networks. Utilizing programmable plasticity units (PPUs), a type of custom CPU, BrainScale simulates synaptic plasticity at one thousand times the speed observed in the human brain. The system is comprised of twenty silicon wafers, each with fifty million plastic synapses and two hundred thousand realistic neurons, and evolves its code based on the physical properties of the hardware. The wafer are constructed of High Input Count Analog Neural Network chips (HICANNs), which simulate actively-changing neurons and synapses. The high speed of this model relative to that of the human brain, due to the fact that the model's circuits are physically shorter than those observed in the brain, permits that it requires much less power input than other simulated neuronal networks. Synaptic weights are determined by the current received by the associated neuron.<ref>About the brainscales hardware¶. About the BrainScaleS hardware - HBP Neuromorphic Computing Platform Guidebook (WIP). (n.d.). https://electronicvisions.github.io/hbp-sp9-guidebook/pm/pm_hardware_configuration.html </ref><ref>Hardware. (n.d.). https://www.humanbrainproject.eu/en/science-development/focus-areas/neuromorphic-computing/hardware/ </ref></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once, utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. [[File:loihi.jpg|<del class="diffchange diffchange-inline">250px</del>|right|thumb|caption|Loihi's connectivity]] When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div> </div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once, utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. [[File:loihi.jpg|<ins class="diffchange diffchange-inline">400px</ins>|right|thumb|caption|Loihi's connectivity]] When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td></tr>
</table>Userhttp://brainengineering.dartmouth.edu/psyc40wiki/index.php?title=24F_Final_Project:_Neuromorphic_Computing&diff=654&oldid=prevUser: /* Hardware and Present Applications */2022-10-22T11:27:28Z<p><span dir="auto"><span class="autocomment">Hardware and Present Applications</span></span></p>
<table class="diff diff-contentalign-left" data-mw="interface">
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<col class='diff-content' />
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<td colspan='2' style="background-color: white; color:black; text-align: center;">← Older revision</td>
<td colspan='2' style="background-color: white; color:black; text-align: center;">Revision as of 11:27, 22 October 2022</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l18" >Line 18:</td>
<td colspan="2" class="diff-lineno">Line 18:</td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[File:wafer.jpg|left|250px|thumb|caption|The wafer of BrainScaleS]]Another tangible example of advancement in neuromorphic computing, BrainScaleS, provides a model for one of the most state-of-the-art, large-scale analog spiking neural networks. Utilizing programmable plasticity units (PPUs), a type of custom CPU, BrainScale simulates synaptic plasticity at one thousand times the speed observed in the human brain. The system is comprised of twenty silicon wafers, each with fifty million plastic synapses and two hundred thousand realistic neurons, and evolves its code based on the physical properties of the hardware. The wafer are constructed of High Input Count Analog Neural Network chips (HICANNs), which simulate actively-changing neurons and synapses. The high speed of this model relative to that of the human brain, due to the fact that the model's circuits are physically shorter than those observed in the brain, permits that it requires much less power input than other simulated neuronal networks. Synaptic weights are determined by the current received by the associated neuron.<ref>About the brainscales hardware¶. About the BrainScaleS hardware - HBP Neuromorphic Computing Platform Guidebook (WIP). (n.d.). https://electronicvisions.github.io/hbp-sp9-guidebook/pm/pm_hardware_configuration.html </ref><ref>Hardware. (n.d.). https://www.humanbrainproject.eu/en/science-development/focus-areas/neuromorphic-computing/hardware/ </ref></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[File:wafer.jpg|left|250px|thumb|caption|The wafer of BrainScaleS]]Another tangible example of advancement in neuromorphic computing, BrainScaleS, provides a model for one of the most state-of-the-art, large-scale analog spiking neural networks. Utilizing programmable plasticity units (PPUs), a type of custom CPU, BrainScale simulates synaptic plasticity at one thousand times the speed observed in the human brain. The system is comprised of twenty silicon wafers, each with fifty million plastic synapses and two hundred thousand realistic neurons, and evolves its code based on the physical properties of the hardware. The wafer are constructed of High Input Count Analog Neural Network chips (HICANNs), which simulate actively-changing neurons and synapses. The high speed of this model relative to that of the human brain, due to the fact that the model's circuits are physically shorter than those observed in the brain, permits that it requires much less power input than other simulated neuronal networks. Synaptic weights are determined by the current received by the associated neuron.<ref>About the brainscales hardware¶. About the BrainScaleS hardware - HBP Neuromorphic Computing Platform Guidebook (WIP). (n.d.). https://electronicvisions.github.io/hbp-sp9-guidebook/pm/pm_hardware_configuration.html </ref><ref>Hardware. (n.d.). https://www.humanbrainproject.eu/en/science-development/focus-areas/neuromorphic-computing/hardware/ </ref></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once, utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Intel's [https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc Loihi 2] neuromorphic processor provides a perhaps even more impressive illustration of neuromorphic computing; released in 2021, the research chip contains one hundred and twenty-eight cores and simulates one million neurons at once, utilizing a spiking neural network that evolves its synapses using variations of backpropagation. With the chip utilizing a spiking neural network (SSN), each "neuron" is regulated by its own ruleset that modulates how the timing of its spiking evolves over time. <ins class="diffchange diffchange-inline">[[File:loihi.jpg|250px|right|thumb|caption|Loihi's connectivity]] </ins>When a spike enters a neuron, the neuron calculates whether the criteria are met for it to subsequently send its own spike onward. The chip is parallelized such that larger events can be processed simultaneously as several smaller events for more efficient computing. Implementing a type of current-based synapse (CUBA) leaky integrate-and-fire neuron model, the chip includes a "membrane potential" that grows weaker over time; if the weighted sum of the input spikes surpasses the firing threshold of a neuron, the neuron itself will subsequently propagate its own spike. Every core in the Loihi chips is fit with a "learning engine" that regulates spike timing and strength by modulating the strengths of individual synapses. Since learning occurs for every [https://u-next.com/blogs/machine-learning/epoch-in-machine-learning/#:~:text=An%20epoch%20in%20machine%20learning,learning%20process%20of%20the%20algorithm. learning epoch], the chips is not confined to any particular architecture; for instance, it can exist as either [https://clickup.com/blog/supervised-vs-unsupervised-machine-learning/?utm_source=google-pmax&utm_medium=cpc&utm_campaign=gpm_cpc_ar_nnc_pro_trial_all-devices_tcpa_lp_x_all-departments_x_pmax-fltv&utm_content=&utm_creative=_____&gad_source=1&gclid=CjwKCAiAxea5BhBeEiwAh4t5Kz1qBvJvoX7lm-S9-yq6-Cjv0LRiHdE1bwZgzJ6KzeAD6BSdj-ARixoCwTYQAvD_BwE supervised or unsupervised] network.  The Loihi chip is considered the first neuromorphic chip to use a fully integrated SNN, integrating key features including variable synapses and a population-based hierarchical connectivity in which the chip utilizes subnetworks to minimize the need for chip-wide connectivity and maximize its efficiency with respect to mapping the networks. Intel looks to commercialize this chip alongside the future advent of mainstream neuromorphic computing.<ref>By. (n.d.-b). Intel advances neuromorphic with Loihi 2, New Lava Software framework... Intel. https://www.intel.com/content/www/us/en/newsroom/news/intel-unveils-neuromorphic-loihi-2-lava-software.html#gs.i83ekc </ref><ref>Loihi - Intel. WikiChip. (n.d.). https://en.wikichip.org/wiki/intel/loihi#:~:text=Loihi%20(pronounced%20low%2Dee%2D,and%20inference%20with%20high%20efficiency.</ref></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>== Limitations and Future Research ==</div></td></tr>
</table>User